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The dual-frequency dual-inductor multiple-output (DF-DIMO) buck converter topology is presented. The topology employs a dual-phase 20 MHz current-mode-controlled input stage to reduce the inductance required per phase to only 200 nH, and a 4-output 100 MHz comparator-controlled fully integrated output stage to reduce the capacitance required per output to 10 nF. In order to enable each output to handle...
A Dual-Frequency Dual-Inductor Multiple-Output (DF-DIMO) buck converter is presented. The 2-phase input stage is switching at 20 MHz and employs two 200-nH inductors, while the output stage is switching at 100 MHz and generates 4, 250-mA outputs. The output capacitors are all fully integrated, and additional bond-wire-based filters are employed at each output for voltage ripple reduction. The proposed...
A power supply on chip (SoC) has been attracted attentions of many researchers because it can realize ultimate minimization of the power supply. It is quite promising for ICT applications because its features, such as smaller volume, high frequency response, and so on, fit for requirement of POL used in ICT equipment. In this paper, we propose the novel concept of digitally controlled multiple output...
An MPSoC system usually consists of a number of processors, a memory hierarchy and a communication mechanism between processors. Because of the gap between the constantly increasing processor speed and slower memory access, how to utilize the memory subsystem more efficiently has become a critical issue for improving the overall system performance. To address this problem, two algorithms are proposed...
This paper proposes a novel technique of dynamic context management scheme for coarse-grained reconfigurable array DSP architecture, which effectively reduces the power consumption and speedup reconfigurable process. The technique permits background loading of configuration data without interrupting the regular execution, overlapping computation with reconfiguration. And stored configurations can...
Heterogeneous MPSoC architectures can provide higher performance and flexibility with less power consumption and lower cost than homogeneous ones. However, as processor instruction sets of general heterogeneous MPSoCs are not identical, tasks migration between two heterogeneous processors is not possible. To enable this function, we propose to build one specific heterogeneous MPSoC platform in which...
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