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A Current design of a system-on-chip (SoC) technology is constructing under increasing demand for high performance, small size and energy-efficient design. To fulfill these demands, it is required to consider a suitable design for on chip interconnection network. In this paper, we design a prototype of communications unit (CU) for a network-on-chip (NoC) architecture based on ring processors interconnection...
This paper presents a NoC topology exploration based on a real-world mobile multimedia application example. An abstract simulation model is used for the exploration. The input parameters of the model and the evaluation of the network topologies are based on synthesized router architectures that enable us to investigate the trade-off between area and maximum clock frequency. We consider deadlock-related...
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