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When one of us (Roberson) used to live in Wheaton, Ill., his car’s FM radio would blare static every time he drove near a pole-mounted electrical transformer. Now, when he’s near a particular intersection in Chicago and an elevated train passes by, his mobile phone call gets dropped. The same thing happened to him in a rapid transit station in Washington, D.C., during a conference call with the other...
This paper shows a methodology to reduce electromagnetic radiation in typical CMOS digital systems from chip PDN design point of view. Total PDN property with anti-resonance peak can be strongly affected by on-die PDN property. Then, in order to suppress anti-resonance peak in total system PDN, design of chip PDN is more effective than off-chip damping method. Then, two similar test chips were designed...
The performance and robustness to PVT variations has been measured of an improved Self Synchronous FPGA (SSFPGA) designed in 65 nm CMOS which achieves 2.97 GHz throughput at 1.2V. The proposed SSFPGA employs a 38×38 array of 4-input, 3-stage Self Synchronous Configurable Logic Blocks, with the introduction of a new dual tree-divider 4 input LUT to achieve a 4.5× throughput improvement...
Electronic devices are increasingly susceptible to simultaneous switching noise (SSN) as devices shrink in size and operate at lower voltage to achieve higher speed. This is a major concern in high-speed system designs as SSN causes voltage and timing variations which affect signal integrity. Consequently, it is imperative that electronic system designers pay strict attention to signal integrity whether...
Microprocessor architecture poses constraints over the dynamic load consumption. Those constraints limit the range of hypothetical stimuli that the power delivery scheme can experience. Some guiding rules for power delivery quality relaxation can be deduced.
An on-chip buck converter with 3D chip stacking is proposed and the operation is experimentally verified. The manufactured converter achieves a maximum power efficiency of 62% for an output current of 70mA with a switching frequency of 200MHz and a 2x2mm on-chip LC output filter in 0.35mum CMOS. The use of glass epoxy interposer to increase the maximum power efficiency up to 71.3%, and the power efficiency...
While the CMOS analog circuits can be designed with the minimum-gate-length of the fabrication process in the alpha-power law MOSFET model, the length of a MOSFET gate has been chosen to be a larger scale than the minimum-gate-length in the conventional Shockleypsilas square model. In this paper, we describe a 6-b 100 MSPS CMOS current steering digital-to-analog converter (DAC) with the alpha-power...
This paper describes a comparative analysis between two topologies of operational amplifiers to design a 40 MS/s 12-bit pipeline analog to digital converter (ADC). The analysis includes AC and transient simulation to select the proper topology. This ADC is implemented in a 0.35 mum AMS CMOS technology with 3.3 V single power supply. The capacitors and selected operational amplifiers were scaled for...
A high bandwidth critical path monitor (1 sample/ cycle at 4-5 GHz) capable of providing real-time timing margin information to a variable voltage/frequency scaling control loop is described. The critical path monitor tracks the critical path delay to within 1 FO2 inverter delay with a standard deviation less than 3 FO2 delays over process, voltage, temperature, and workload. The CPM is sensitive...
A circuit for on-chip measurement of long-term jitter, period jitter, and clock skew, is demonstrated. The circuit uses a single latch and a voltage-controlled delay element, and is evaluated in a stand-alone pad frame. Excellent reproduction of jitter measured by oscilloscope is shown. Measured jitter resolution is 1 ps or better. The circuit is also incorporated into a 2 GHz clock distribution network...
Over the last two years, Thales Electron Devices (TED) has developed and industrialized a new generation of microwave power module (MPM). This generation has been designed for military applications such as data link, radars (illuminators or weather radars) and electronic warfare (EW) systems. TED has designed the MPM to be modular. Depending on the future system needs, the MPM can be reconfigured...
A novel configuration for a Brillouin distributed fiber sensor based on Brillouin optical time-domain analysis is proposed. This configuration eliminates many intensity noise issues found in previous schemes. Resolution of 7 m all over a 47 km single-mode fiber was achieved and resolution down to 30 cm in a few kilometer fiber. Noise reduction makes possible measurements with a 16 times averaging.
Optical communication systems based on dense wavelength division multiplexing (DWDM) would benefit from the ability to adjust the operating wavelength of a laser transmitter. Previous attempts, including thermal adjustment, etalon based wavelength locking, and various types of optical frequency and phase locked loops such as the Pound-Drever-Hall technique suffer from weaknesses including sensitivity...
A high intercept points, cost-effective, and power-efficient switching FET double balanced mixer (DBM) is reported. The Switching FET DBM demonstrated in this work offers input intercept points (IIP3) and conversion loss typically 44 dBm and 8.5 dB respectively with 15 dBm LO power for the frequency band (RF: 900-2150 MHz, LO: 850-1950 MHz, IF: 50-200 MHz). The measured interport isolation is typically...
Any switched mode power supply is a source of EMI that can interfere with the operation of the coexisting electronic/electrical equipments by conduction and/or by radiation. To minimise such interferences to accepted levels, the EMC standards specify the limits for the emission spectrum emanating from the power sources. This paper discusses a case study how a commercially available Uninterrupted Power...
A family of linearized transconductors consisting of N bipolar transistor differential pairs are introduced. The basic idea of the linearization technique is to synthesize a single linearized de transfer characteristic from the nonlinear transfer characteristics of individual differential pairs operating in parallel. Maximally flat transfer characteristics can be obtained by giving each pair an appropriate...
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