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We will demonstrate the effectiveness of power supply active compensation techniques in mixed signal device performance testing. Read channel speed sorting for data storage SOCs is used to illustrate how we minimize the power transient effect in ATE test, where read-channel current draw varies drastically between different mission-modes and power-saving-modes. These active compensation ideas are critical...
This paper explores the main design issues related to power supply infrastructure needed for a vehicle charging system to be implemented in a large parking deck. The design challenges with such a system have been investigated. Simulations have been performed to characterize the chargers as loads and a supply design is proposed. The design components include the sizing of the supply cables and the...
The design of integrated circuits, especially system-on-chips (SoC) is now constrained by many parameters such as speed, energy but also the robustness to process variability. Indeed, controlling the speed and the energy in a complex SoCs - which adopt the globally asynchronous locally synchronous (GALS) paradigm - require specific power supplies and clock generators as actuators and dedicated sensors...
An RF-wireless system for transcutaneous energy transmission is described. The power supply module for in-vivo neural channel bridging SOC is designed, fabricated and tested. It includes two coils, one rectifier and one regulator. Several improvements are made to get a higher efficiency. The experimental results demonstrate that these improvements work well and the module meet the requirement of the...
Combining the supply ripple subtraction and high-pass filtering can improve the power supply rejection (PSR) over wideband frequency of low dropout regulator (LDO). The proposed LDO is fabricated by TSMC 0.35 ??m 2-poly 4-metal CMOS process. The simulation results at maximum load current of 100 mA, show that PSR at 10 k, 100 k and 1 M are -72 dB, -75 dB and -46 dB, respectively. Therefore, it's well...
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