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A three bit second order delta sigma modulator for audio applications implemented in 130nm CMOS technology is presented. The modulator features two integrators, a flash quantizer and two current steering DACs. In order to minimize the effect of delays in the DACs, excessive loop delay (ELD) compensation is utilized. Using an oversampling ratio (OSR) of 80, the design consumes 2.8mW and achieves a...
This paper proposes a full speed digital gain error calibration technique for pipelined ADCs. The calibration takes care of both finite op-amp gain and capacitor mismatch. Unlike previous calibration techniques that use resistor ladder to generate the calibration signal, the proposed technique uses capacitors switching to reference voltages to eliminate the large RC time constants associated with...
An operational amplifier is described which uses separate loops to control the output voltage and the error voltage between its inputs. To a large extent this architecture combines the high-speed characteristics of “current feedback” amplifiers with the low input referred errors of precision architectures. The technique has been applied to produce an amplifier with precision characteristics comparable...
Two voltage-mode multi-phase sinusoidal oscillators are realized in this paper using dual output second generation current conveyors as active elements and with some passive elements. The topology of proposed oscillator-I is a non-inverting band-pass filter and a unity gain feedback circuit. The proposed oscillator-II realizes a voltage mode oscillator and generates eight phases of sinusoidal output...
The paper presents new realizations of quadrature sinusoidal oscillators suitable to be used in voltage-mode or current-mode applications. An active device independent topology is proposed and which can be practically implemented using commercially available active elements. Two circuits are exemplified: (i) voltage-mode quadrature oscillator using two current feedback operational amplifier (CFOA),...
This work proposes and develops an original compensation approach for low-power three-stage operational transconductance amplifiers driving large capacitive loads. The proposed solution is based on the basic reversed nested Miller compensation and exploits a voltage buffer and two nulling resistors in the compensation network, along with a feedforward stage to improve slewing and settling performance...
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