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An equivalent single conductor (ESC) model is proposed for the time domain analysis of a CMOS gate driving a high speed interconnect consisting of a single wall carbon nanotube (SWCNT) bundle. The computed responses to a step-input voltage are compared to the ones of a multiconductor transmission line (MTL) model. The results obtained are in very good agreement. The 50% time delay tpd of the nano-interconnect...
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