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This paper presents a low power Impulse-Radio Ultra-WideBand (IR-UWB) receiver for low range and low data rates applications. The receiver adopts a non coherent detection with duty cycling that allows very low power consumption. The receiver operates in the high band of the UWB frequency band. It has been designed for the 7.2-8.5GHz bandwidth and covers channels 8, 9, 10, and 11 of the IEEE 802.15...
SuperNEMO is the next-generation (0νββ) experiment based on a tracking plus calorimetry technique. The demonstrator is made of a calorimeter (712 channels) and a tracking detector (6102 channels). These detectors front-end electronics use an unified architecture. The calorimeter and tracker can operate separately. We have an overlap between the zoning of the calorimeter and the tracker. The final...
The integration of a variety of IP cores into a single chip to meet the high demand of new applications leads to many challenges in timing issues, especially the interface between different clock domains. Globally Asynchronous, Locally Synchronous (GALS) approach addresses these challenges by dividing a chip into several independent subsystems working with different clock signals. In multi-synchronous...
The first challenging step of the demodulation of the DVB-S2 signal with function of VCM (Variable Coding and Modulation)/ACM (Adaptive Coding and Modulation) is the detection of the Physical Layer (PL) header. PL header is transmitted using π/2-BPSK modulation and is composed of a fixed part (26 bits of Start Of Frame (SOF)) and a variable part (64 bits codeword of PL Signaling (PLS) code that defines...
Today's distributed real-time systems require flexibility to adapt to evolving functional and non-functional requirements in run-time. The authors have presented in previous works a middleware architecture based on the Flexible Time-Triggered (FTT) paradigm that allows creating flexible real-time distributed applications over CORBA. This paper focuses on the design of the central node of the architecture,...
In this work, the AR-PET architecture is introduced and described. Its data acquisition system is composed of four layers of data processing with the purpose of computing the parameters as soon as possible to reduce data bandwidth for the next layer. FPGAs were used as main processing devices for the first three layers. The first layer computes pulse energy and timestamp, the second layer computes...
This paper presents a novel synchronization scheme that base on Baker Codes autocorrelation property for UWB impulse radio system. Simple threshold detection circuit is used to perform early quantization. An asynchronous pulse capture block is introduced to perform a direct down conversion of the UWB pulses from RF band to baseband. The new scheme provides run time synchronization tracking and resynchronization...
Large LAr TPCs are among the most powerful detectors to address open problems in particle and astro-particle physics, such as CP violation in leptonic sector, neutrino properties and their astrophysical implications, proton decay search etc. The scale of such detector implies severe constraints on their readout and DAQ system. In this article we describe a data acquisition scheme for this new generation...
A high bandwidth critical path monitor (1 sample/ cycle at 4-5 GHz) capable of providing real-time timing margin information to a variable voltage/frequency scaling control loop is described. The critical path monitor tracks the critical path delay to within 1 FO2 inverter delay with a standard deviation less than 3 FO2 delays over process, voltage, temperature, and workload. The CPM is sensitive...
Based on simple comparison between a conventional navigation receiver and a GNSS software receiver, a generic GNSS receiver architecture is given, which focuses on the GPS IF signal processing algorithm in the channel. According to the channel states the algorithm falls into four parts: signal acquisition, confirmation, fine frequency estimation and tracking. A frequency domain acquisition based on...
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