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Distributed cyber-physical systems cover a wide range of applications such as automotive, avionic or industrial automation. These applications require a global notion of time to fullfill their timing requirements. Multi-processor system on chips (MPSOCs) are an attractive implementation option since they offer several benefits such as parallelism and power efficiency. However, MPSOCs have a Globally...
For resource-constrained embedded real-time systems, resource-efficient approaches are very important. Such an approach is presented in this paper, targeting systems where a critical application is partitioned on a multi-core platform and the remaining capacity on each core is provided to a noncritical application using resource reservation techniques. To exploit the potential parallelism of the non-critical...
Malleable jobs are those which can dynamically shrink or expand the number of processors on which they are executing at runtime in response to an external command. Malleable jobs can significantly improve system utilization and reduce average response time, compared to traditional jobs. To realize these benefits, three components are critical — an adaptive job scheduler, an adaptive resource manager,...
Parallel programming has been widely used in many scientific and technical areas to solve large problems. While general-purpose processors have rich infrastructure to support parallel programming on shared memory, such as coherent caches and synchronization libraries, parallel programming infrastructure for FPGAs is limited. Thus, development of FPGA-based parallel algorithms remains difficult. In...
The synchronization of accesses to shared memory buffers in multi-core platforms can be realized through lock-based synchronization protocols. If the embedded application executing on the system has hard real-time constraints, the worst-case blocking times for accessing remotely shared resources can negatively impact the schedulability guarantee. In this case, wait-free communication protocols can...
Under current analysis, soft real-time tardiness bounds applicable to global earliest-deadline-first scheduling and related policies depend on per-task worst-case execution times. By splitting job budgets to create sub jobs with shorter periods and worst-case execution times, such bounds can be reduced to near zero for implicit-deadline sporadic task systems. However, doing so could potentially cause...
Semi-partitioned scheduling has become the subject of recent interest for multiprocessors due to better utilization results, compared to conventional global and partitioned scheduling algorithms. Under semi-partitioned scheduling, a major group of tasks are assigned to fixed processors while a low number of tasks are allocated to more than one processor. Various task assigning techniques have recently...
This paper presents the first real-time multiprocessor locking protocol that supports fine-grained nested resource requests. This locking protocol relies on a novel technique for ordering the satisfaction of resource requests to ensure a bounded duration of priority inversions for nested requests. This technique can be applied on partitioned, clustered, and globally scheduled systems in which waiting...
There is an important class of scheduling strategies that has not been sufficiently covered by the real-time scheduling literature. The new multi-core extensions of the AUTOSAR automotive standard — the dominating automotive design worldwide — uses a combination of partitioned fixed-priority scheduling strategies with preemptive and non-preemptive execution and (potentially) arbitrary deadlines. Since...
Semi-partitioned scheduling has been the subject of recent interest, compared with conventional global and partitioned scheduling algorithms for multiprocessors, due to better utilization results. In semi-partitioned scheduling most tasks are assigned to fixed processors while a low number of tasks are split up and allocated to different processors. Various techniques have recently been proposed to...
Due to mature design tools and proven flows for design and test the majority of today's circuits are synchronous. Increasingly complex designs pose major problems though with respect to clock tree design, interfaces running at different frequencies, peak current consumption and electromagnetic interference. The asynchronous design style promises advantages in these areas but is not widely accepted,...
MPI All to all communication is widely used in many high performance computing (HPC) applications. In All to all communication, each process sends a distinct message to all other participating processes. In multicore clusters, processes within a node simultaneously contend for the same network resource of the node in All to all communication. However, many small synchronization messages are required...
This paper studies the realization and scalability of release and protected release consistency models in Network-on-Chip (NoC) based Distributed Shared Memory (DSM) multi-core systems. The protected release consistency (PRC) model is proposed as an extension of the release consistency (RC) model and provides further relaxation in the shared memory operations. The realization schemes of RC and PRC...
With the prevalence of multi-core processors, it is a trend that the embedded cluster deploys SMP nodes to gain more computing power. As a crucial issue, the MPI inter-process communication has been suffering the contradiction between high performance and embedded constraints. Moreover, there is a big performance gap between intra- and inter-node communication for different infrastructures. In this...
In addition to trade-offs between convergence and response spans as described by Gouda and Evangelist, we consider state space utilization with regard to processing and communications, and sensitivity to delay time estimates. In order to be delay insensitive, estimates of transmission and/or computation time are used, which we implement as virtual nodes. The estimated number of nodes is defined as...
Future CMPs will combine many simple cores with deep cache hierarchies. With more cores, cache resources per core are fewer, and must be shared carefully to avoid poor utilization due to conflicts and pollution. Explicit motion of data in these architectures, such as message passing, can provide hints about program behavior that can be used to hide latency and improve cache behavior. However, to make...
An approach to carrying out asynchronous distributed simulation of multiprocessor message passing architectures is presented. Aiming at achieving better performance on Conservative DEVS-based simulations, we introduce the GLM protocol which borrows the idea of safe processing intervals from the conservative time window algorithm and maintains global synchronization in a fashion similar to the distributed...
Many distributed and multiprocessor real-time applications consist of pipelines of tasks that must complete before their end-to-end deadlines. Different schedulability analyses have been proposed for both Fixed Priority and Earliest Deadline First scheduling. All the schedulability analyses proposed so far assume that a global clock synchronization protocol is used to synchronize the deadlines of...
Multi-core platforms seem to be the way towards increasing performance of processors. As the multi-cores are becoming the defacto processors, the need for new scheduling and resource sharing protocols has arisen. However, taking such technology to an industrial setting, it needs to be evaluated such that appropriate scheduling, synchronization and partitioning algorithms are selected. In this paper...
Allowing real-time systems to autonomously evolve or self-organize during their life-time poses challenges on guidance of such a process. Hard real-time systems must never break their timing constraints even if undergoing a change in configuration. We propose to enhance future real-time systems with an in-system model-based timing analysis engine capable of deciding whether a configuration is feasible...
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