The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
Design and testing of analog and mixed-signal (AMS) circuits is often regarded as representing significant bottlenecks in system-on-chip (SOC) design. Testing the analog and mixed-signal circuitry of a mixed-signal IC has become a difficult task. This is due to the fact that most analog and mixed signal circuits are tested by its functionality, which is both time consuming and expensive. Hence the...
The objective of using logic BIST for online and periodic testing is to identify defects, like opens, resulting from the wear and tear of the circuit. We have shown that existing test sets have a low coverage for open defects located in scan flip-flops, even though such defects may affect functional operation. Existing Logic BIST structures suffer from the same limitations. A novel Logic BIST architecture...
Soft errors caused by ionizing radiation have emerged as a major concern for current generation of CMOS technologies and the trend is expected to get worse. Soft error rate (SER) measurement, expressed as number of failures encountered per billion hours of device operation, is time consuming and involves significant test cost. The cost stems from having to connect a device-under-test to a tester for...
Memory built-in self test (MBIST) or as to it array built-in self test is an amazing piece of logic. Without any direct connection to the outside world, a very complex embedded memory can be tested efficiently, easily and less costly. Modeling and simulation of finite state machine (FSM) MBIST is presented in this paper. The design architecture is written in very high speed integrated circuit hardware...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.