The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
The purpose of this paper is to provide low cost, high power quality and high efficiency solutions for grid-connected inverters. Compared with bipolar switched inverters, unipolar switched inverters have the advantages of higher efficiency due to reduced switching frequency and low iron losses of inductor in output filter. However, unipolar inverters produce large harmonic distortion due to the dead-time...
The Multilevel inverter is emerging as a new breed of power inverter option for high power applications, Especially for FACTS controllers. This can create high voltage and reduce harmonics by its own circuit topology. The power levels of the inverter are largely restricted by carrier frequency. For air cooled design the frequency is practically limited to 3 to 5 KHz for large inverters, hence to increase...
The present paper deals with a generalized control strategy for the following multilevel inverters: Neutral Point Clamped (NPC), H-Bridge, and Load Phase Clamped (LPC). The contribution of this work is to develop, in spite of these devices differences, a common control strategy using simple triangular sinus PWM. By applying Petri Network theory, common configurations of these inverters are established...
The dead time necessary to prevent the short circuit of the power supply in pulse width modulated (PWM) voltage inverters results in output voltage deviations. In this paper, the novel control method for a single-phase half bridge inverter based on the direction of filter inductor current is presented based on the hysteresis control technique. The switches driving signals of half bridge inverter is...
Based on the analysis of SHPWM method, we proposed an improved modulation method suited for cascaded multilevel inverter of three-phase systems, which is called carrier overlapping - switch frequency optional - pulse width modulation (CO-SFO-PWM). The method combines the advantages of carrier overlapping and switch frequency optional, which enables it to increase the fundamental amplitude of the output...
This paper presents a dual-buck full-bridge inverter (DBFBI) with the sinusoidal pulse width modulation (SPWM) and single current sensor. Shoot-through problem does not exist. All the power devices and filter inductors operate at each half line cycle, thus the efficiency can be increased. Only one switch works at high frequency when the reference current and the output voltage have the same polarity,...
The two-level PWM inverter has expanded in industrial applications because it was able to achieve maintainability and high performance to surpass the DC drive by the development of the vector control and the IGBT (Insulated Gate Bipolar Transistor). However, as the main motor drive of the metal plant rolling mill, the two-level inverter output voltage was too low and capacity was too small, so the...
A current control method for the utility interactive inverter based on multi-rate deadbeat control method with FPGA based hardware controller is verified for 100 kHz carrier PWM inverter. As the distributed power systems spread, the requirement of the control accuracy for the utility interactive inverter becomes more precise. Deadbeat control is one method to ensure the output voltage or current matches...
This paper discusses improvement of common-mode voltage elimination ability of a PWM inverter with an auxiliary inverter. The main inverter and the small capacity auxiliary inverter are connected at the neutral point of the LC filter. The auxiliary inverter compensates common-mode voltages of the main inverter. Additionally, because the auxiliary inverter does not output active power, the capacity...
This paper introduces a novel circuit configuration of multilevel current-source inverter (CSI) that has many steps with fewer power switches. In this new topology, an H-bridge CSI is connected with current-cell circuits working to generate the intermediate level currents of multilevel current waveform. Using the proposed topology, the switching power device count, isolated gate drive circuits and...
With the increased application of adjustable-speed drive of AC motor, there has been a growing number of failures such as electromagnetic interference(EMI) caused by common mode current, and bearing current. Especially, bearing current leads to motor bearing material erosion and early mechanical failure. To reduce the bearing current, there are two methods, one is reduce the common mode voltage, and...
The text aims at the harmonic pollution and powerless of the electronic network caused by inverter. Based on the foundation of power device IEGT and dual-PWM three-level inverter characteristics, the contrast of the rectifier three-pulse PWM modulate mode and the triangle PWM modulate mode is given. As a result, IEGT dual-PWM three-level inverter possesses the characteristics such as the good input...
A novel, high-efficiency inverter using MOSFETs for all active switches is presented for photovoltaic, non-isolated, AC module applications. The proposed H6-type configuration features high efficiency over a wide load range, low ground leakage current, no need for split capacitors, and low output AC-current distortion. The detailed power stage operating principles, PWM scheme, and novel bootstrap...
The paper proposes a generalized circuit configuration of a new multilevel current-source inverter (CSI) with no-isolated switching devices. In this new multilevel inverter topology, all of the power-switches in the inverter are connected on a common-potential level. Hence, all of the power switches only need a single gate drive power supply without using isolated power supplies or conventional bootstrap...
This paper deals with a new circuit prototype of two active edge resonant cells-assisted soft-switching symmetrical PWM half-bridge inverter type DC-DC high power converter employing a high frequency planar transformer with center-tapped secondary windings and rectifier with choke-input. Its operating principle is described in detail by using switching mode transition equivalent circuits which is...
The switching dead-time necessary in PWM inverters results in output distortions, and deteriorates the utilization of dc-link voltage. To solve these problems, the authors have developed an accurate dead-time effect mathematical model, and proposed a compensation scheme for grid-connected inverters. In this paper, a new voltage control and PWM modulation scheme is presented for the dead-time compensation...
A current-source inverter with variable frequency is proposed for the grid-connected photovoltaic generation system in order to improve power quality, reduce current harmonics and decrease the frequency of switches. Besides applying energy to grid in the form of alternative current output using full-bridge switches, this topological structure can also complete maximum power point tracking by changing...
A new dasiaextended turn-off timepsila compensation parameter is introduced to overcome the low-current nonlinear voltage distortion effect in IGBT inverters. The compensation technique uses datasheet parameters in conjunction with an analytical approach to model the low-current switching characteristics of an IGBT. As a result, output voltage amplitude is accurately controlled and low-order voltage...
This paper presents a new hybrid current control scheme for dead-time compensations and power density optimization of grid-connected dc/ac inverter. A sliding mode controller is designed for compensating the dead-time nonlinear operations, and a PI controller operates in the linear areas. According to the SMC controller output, the unnecessary gate drive signals are removed and the counter side switch...
This paper presents the comparison of unipolar multicarrier pulse width modulation (PWM) techniques for the flying capacitor multi level inverter (FCMLI). Due to switch combination redundancies, there are certain degrees of freedom to generate the five level AC output voltage. This paper presents the different types of unipolar PWM strategies for the chosen inverter. The effectiveness of the developed...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.