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A glitch compensation methodology is proposed in this paper which involves in reducing the undesired switching of combinational circuits in order to save dynamic power. The proposed methodology can be seamlessly integrated to existing physical design flow. A glitch is an undesired transition that occurs before intended value in digital circuits. A glitch occurs in CMOS circuits when differential delay...
In this paper we present DAC for multiple valued system by utilizing pseudo floating gate (PFG) transistor. It has an advantage to operate the gate in continuous mode The avoidance of recharging floating gate is shown and simulation result is provided.
In this paper, we compare different existing keeper techniques for reducing power consumption of wide domino logic circuits. We will compare power consumption plus area overhead of each of these methods, with the conventional keeper circuit. A 16-bit multiplexer circuit, in 0.13 mum CMOS technology operating at a frequency of 500 MHz is our test-bench. Simulations show split-domino (SD), with 53%...
This paper presents a high speed low power 4:2 compressor cell design based on Domino Logic circuits. Two circuit level optimizations of 4:2 compressors are proposed by using Split Domino Logic and Multiple-output Domino Logic. All three designed circuits are simulated using HSPICE and compared with each other in terms of delay, power consumption, power-delay product, and operation frequency. Simulation...
In this paper, we investigate optimum radiation hardened by design (RHBD) for use against single-event transients (SET) using low-pass filters (LPF) including RHBD techniques against single-event upsets (SEU) for sequential logic in 45 -nm technology in a terrestrial environment. Three types of LPF were investigated regarding their SET pulse immunities, area penalties, and performance penalties. We...
This paper proposes novel fast addition and multiplication circuits that are based on non-binary redundant number systems and single electron (SE) devices. The circuits consist of MOSFET-based single-electron (SE) turnstiles. We use the number of electrons to represent discrete multiple-valued logic states and we finish arithmetic operations by controlling the number of electrons transferred. We construct...
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