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In this paper, a limiting/logarithmic amplifier (LLA) for high dynamic range wideband bioelectrical impedance measurements is presented. The amplifier is composed of eight cascaded gain stages with a folded diode-connected transistor as a load that attain wide bandwidth performance with limited power consumption. The logarithmic conversion of the input variable is carried out with the aid of nine...
This paper presents a systematic design methodology for logarithmic amplifiers and receiver signal strength indicator (RSSI) circuits. A close expression for the maximum detection error using a piece wise linear approximation of the logarithmic function was derived. The design methodology has been proposed that optimizes the power consumption and 3 dB bandwidth of a single stage CMOS limiting amplifier...
A 53 dB gain limiting amplifier for OC-192 and 10 GbE applications is developed in a 50 GHz fT SiGe SOI complimentary bipolar process, and has 5 mV pk-pk sensitivity, 1.25 V pk-pk maximum input signal, 14 ps (20/80%) rise/fall times and 450 mV pk-pk output into matched differential 50 Ohm loads, consuming 430 mW on a 3.3 V supply. Input Cherry-Hooper gain stages limit the -3 dB bandwidth to 11 GHz...
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