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In this paper, two high-resolution medium-bandwidth single-loop 4th-order single-bit sigma-delta modulators using a feed-forward and a feedback topology respectively are implemented in 0.13μm CMOS technology. The oversampling ratio is 50 with 312.5kHz input bandwidth, 14.66-bit and 16.62-bit resolution have been reached. The two circuits each consume about 8-mW from a single 1.2V supply voltage. After...
This paper describes a multi-bit cascaded sigma-delta modulator in which an over-sampled single-bit DAC emulates the behavior of a multi-bit DAC. Such an implementation, benefits from the inherent linearity of a single-bit DAC, and avoids the extra loop-delay imposed by dynamic element matching techniques required to linearize multi-bit DACs. The behavior of an oversampled single-bit DAC has been...
In this work, the bulk-gate controlled circuit to improve the power supply ripple ratio (PSRR) of a Low Dropout Regulator (LDO) which deteriorates due to lowering power consumption is proposed. Designing with 0.25 mum CMOS process, the simulation results by HSPICE shown that the proposed circuit provides a high performance of PSRR even though 1/10 of the power consumption is reduced compare to the...
Current mode (CM) scheme provides suitable alternative for the high speed on-chip interconnect signaling. This paper presents a energy-delay optimization methodology for the current-mode (CM) signaling scheme. Optimization for the CM circuits for on-chip interconnects requires a joint optimization of driver and receiver device sizes, as their parameters which affect the energy-delay performance depend...
Class D amplifiers are becoming the most feasible solution for embedded audio application. However, distortions due to the non-linear nature of switching stage are the main drawback for this amplifier topology. This paper discusses the design and implementation of high fidelity audio class D using sliding mode control scheme. This design method proves to be a cost effective solution for industrial...
In this paper, the characteristics of the basic current mirror and the continuous-time current-mode current mirror integrator are analyzed. Using the two unlossy loop integrators and the basic current mirrors, the biquad circuit block is implemented. The signal flow graph (SFG) and the improved leap-frog (ILF) structure are simple to implement the six-order band pass filters. Exploring PSPICE9.1 simulation...
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