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This paper describes a methodology for building a reliable internet core router that considers the vulnerability of its electronic components to single event upset (SEU). It begins with a set of meaningful system level metrics that can be related to product reliability requirements. A specification is then defined that can be effectively used during the system architecture, silicon and software design...
This paper summarizes some rather extensive research on the problem of constructing logic nets out of elements whose timing causes trouble either in their slowness or in their lack of precision. The problem is made precise by setting up a theory of logic nets that is abstract but realistic. Its abstractness consists in its lack of similarity to any particular hardware, and in its strictly mathematical...
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