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This paper presents global dynamic power and signal integrity analysis methodologies for chip-package-board co-design and co-simulation. The proposed methodologies are based on efficient combination of power switching activity macro-modeling with broadband multi-port model extractions. Dedicated real-life test carriers are employed for benchmarking purposes and correlation with on-wafer measurement...
Polymorphic gates can be considered as a new reconfigurable technology capable of integrating logic functions with sensing in a single compact structure. Polymorphic gates whose logic function can be controlled by the level of the power supply voltage (Vdd) represent a special class of polymorphic gates. A new polymorphic NAND/NOR gate controlled by Vdd is presented. This gate was fabricated and utilized...
While the CMOS analog circuits can be designed with the minimum-gate-length of the fabrication process in the alpha-power law MOSFET model, the length of a MOSFET gate has been chosen to be a larger scale than the minimum-gate-length in the conventional Shockleypsilas square model. In this paper, we describe a 6-b 100 MSPS CMOS current steering digital-to-analog converter (DAC) with the alpha-power...
Graphene is a possible candidate for advanced channel materials in future field effect transistors. This presentation gives a brief overview about recent experimental results in the field of graphene transistors for future electronic applications.
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