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Monitoring operations in today's mobile networks is becoming a more and more challenging task due to the higher bandwidth and technological complexity brought by LTE. The paper summarizes some relevant problems that arose in the tests of LTE equipment carried out at Telecom Italia Lab (TILAB, the R&D center of Telecom Italia), and presents an ongoing project that aims at realizing a flexible hardware/software...
One design goal of future processors is to maximize the performance per watt. However, the performance of general purpose processors can be hardly improved by barely increasing clock frequency. This paper presents an application specific reconfigurable processor architecture which is fine tuned for high performance computing. It benefits from the application specific hardware customized to significantly...
One of the critical goals in code optimization for multi-processor-system-on-a-chip (MPSoC) architectures is to minimize the number of off-chip memory accesses. This is because such accesses can be extremely costly from both performance and power angles. While conventional data locality optimization techniques can be used for improving data access pattern of each processor independently, such techniques...
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