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In this paper, an approach is made to design a Thermal and Power efficient RAM for that reason we have used DDR4L memory and six different members of SSTL I/Os standards on 28nm technology. Every spacecraft requires most energy efficient electronic system and for that very purpose we have designed the most energy efficient RAM. In this design, we have taken two main parameters for analysis that is...
In this paper, we have designed a power efficient data center using SSTL I/O standards. We have compared the performance of our data processing device through different processors. To increase the performance, Stub-Series Terminated Logic I/O standards are used. 17 distinct functions were performed on DPD that calculated the capability of four distinct processors. At operating frequency of 1.9 GHz...
It has been observed that amongst all the 22 languages being used Devanagari script is being the primary and most widely used script. Devanagari is used for writing the Hindi language in India. In this paper Energy Efficient Devanagari Unicode Reader has been designed. Devanagari is used for writing the Hindi language in India. In this paper Devanagari Unicode Reader code has been implemented on Xilinx...
In this paper six different available classes of Stub-Series Terminated Logic (SSTL) Input/output standard is used for the design of Green Fibonacci generator on 40nm FGPA. That green Fibonacci Generator is used to generate key for Wi-Fi Protected Access in order to make energy efficient communication or green communication possible. Six SSTL I/O standards include SSTL18_I, SSTL18_II, SSTL18_I_DCI...
Energy Efficient medical equipment design is the current research trend in medical science. Now, scientists are shifting focus toward energy efficient medical equipment design, ECG machine is the commonly used medical equipment. If any medical equipment is consuming less power than the traditional counterpart, then the whole medical system will be more greener or energy efficient. Finally, it reduces...
In this work of low power memory design on FPGA, we are using the most energy efficient I/O standard among LVCMOS, HSLVDCI, HSTL, LVDCI_DV2 and SSTL. I/O standard is used to match impedance of transmission line, impedance of port and impedance of memory for avoidance of transmission line reflection. In naming convention of I/O Standard, LV is Low Voltage, HS is High Speed, DV2 is Half Impedance, CMOS...
When we conserve energy resources from any systems, our environment can enjoy cleaner air and a healthier, and we can help protect the climate by reducing heating due to more energy consumption. Energy Efficient medical equipment design is the latest research in medical science. Now, scientists are focus and shifting toward energy efficient medical system design. ECG machine is the most commonly used...
Stub Series Terminated Logic (SSTL) is an Input/output standard. It is used to match the impedance of line, port and device of our design under consideration. Therefore, selection of energy efficient SSTL I/O standard among available different class of SSTL logic family in FPGA, plays a vital role to achieve energy efficiency in design under test (DUT). Here, DUT is ROM. ROM is an integral part of...
In this paper, we are implementing green Integrator. Digital integrator is an analog to digital converter. Which is designed in Xilinx ISE14.6 using various IO standard of SSTL in 28nm Kintex-7 FPGA. We are comparing different IO standard of SSTL to get minimum IO power. Via SSTL technology, we achieve green computing with respect to low voltage impedance. We are using different classes of SSTL in...
In this paper an approach is made to design the voltage based efficient fire sensor and for that reason we have used four different kinds of Stub Series Terminated Logic (SSTL)IO standards. Airflow and heat sink are main parameters while analyzing the thermal dissipation in the circuit. In this work we have taken two values for LFM i.e. 250, 500 and three profiles for heat sink are taken, these are...
In this paper, green Image ALU is designed in Xilinx ISE 14.6 using different IO standard of SSTL in 40nm Virtex-6 and Spartan-6 FPGA. We are comparing different SSTL IO standard to get reduction in IO power. We accomplish energy efficiency with respect to low voltage impedance, by using SSTL technology. In this entire work, we are using different classes of SSTL and observe that when image ALU operates...
In this work, we are using Stub Series Transistor Logic (SSTL) on the simplest VLSI circuit multiplexer and analyze the power dissipation with different class. Using SSTL15 in place of SSTL2_II_DCI, there is reduction of 304mW power i.e. 76.19% power reduction. Using HSTL_I_12 in place of HSTL_III_DCI_18, there is reduction of 157mW power i.e. 62.3% power reduction. HSTL and SSTL are IO standards...
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