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This paper presents analytical considerations and practical thoughts leading to the design and implementation of a low power, small-area voltage comparator for pixel-level signal processing in time-based image sensors. The circuit is based on a standard two-stage operational amplifier topology and features an offset suppression technique to minimize the area requirements, a tunable hysteresis and...
This paper presents a time-domain correlated double sampling (CDS) method for time-based/PWM image sensors. The concept has been realized in the pixel circuit design for a spiking asynchronous, time-based image sensor (ATIS). The pixel circuitry includes a two-stage voltage comparator with tunable hysteresis and dynamic current control, and pixel-level state logic. The sensor, based on a 240times304...
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