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A new design approach of the LDPC decoder based on FPGA Impulse C Programming is proposed. The latest technique of Impulse C programming is used to implement hardware circuit, which is more efficient than the traditional HDL method. The decoder for a family of (3,6) LDPC Codes with 0.5 code rate and the block size of 2500 bits is implemented on Xilinx Virtex2 XC2V2000. When the maximum iteration time...
In his paper last year, Andrew Evans of Broadcom Corporation outlined the exciting concept of Protocol Aware ATE, and even made the plea for ATE vendors to ldquomake a broad paradigm shift in ATE architecture that will enable true system level testing as part of the production test flow and methodology.rdquo [1] This concept of system level testing requires intelligent test equipment to have integrated...
Field programmable gate arrays (FPGAs) are getting more and more attractive for military and aerospace applications, among others devices. The usage of non volatile FPGAs, like Flash-based ones, reduces permanent radiation effects but transient faults are still a concern. In this paper we propose a new methodology for effectively measuring the width of radiation-induced transient faults thus allowing...
The way of on-board digital signal processing based on FPGA is studied. It contains requirement analysis of the on-board processing functional specifications, an on-board real-time digital signal processing system is designed with radiation tolerant FPGA. The design takes full advantage of the massively parallel architecture of the FPGA logic slices to achieve real-time processing at a high data rate,...
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