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In many DSP applications (image and voice processing, baseband symbol decoding in high quality communication channels) several dBs of SNR loss can be tolerated without noticeable impact on system level performance. For power optimization in such applications, voltage overscaling can be used to operate the arithmetic circuitry slower than the critical circuit path delay while incurring tolerable SNR...
In this work, the bulk-gate controlled circuit to improve the power supply ripple ratio (PSRR) of a Low Dropout Regulator (LDO) which deteriorates due to lowering power consumption is proposed. Designing with 0.25 mum CMOS process, the simulation results by HSPICE shown that the proposed circuit provides a high performance of PSRR even though 1/10 of the power consumption is reduced compare to the...
This paper describes a comparative analysis between two topologies of operational amplifiers to design a 40 MS/s 12-bit pipeline analog to digital converter (ADC). The analysis includes AC and transient simulation to select the proper topology. This ADC is implemented in a 0.35 mum AMS CMOS technology with 3.3 V single power supply. The capacitors and selected operational amplifiers were scaled for...
The increasing ubiquity of mobile embedded systems has been matched by the evolution of a variety of wireless network standards and technologies. The major constraints of wireless embedded systems are limitations of communication bandwidth, processing capabilities, and battery power. Remote wireless embedded systems often act as sensors, which provide data to a certain community. The exchange of data...
In this paper, we address the issue of transmission power control (TPC) in wireless ad hoc networks. Power control plays an important role in energy saving and network performance enhancement. However, the existing TPC schemes either face the problem of hidden and exposed terminal or have additional hardware requirements. We propose a novel distributed power control protocol, called Receiver Initiated...
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