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As the density of field-programmable gate arrays continues to increase, the size of configuration bitstreams grows accordingly. Compression techniques can reduce memory size and save external memory bandwidth. To accelerate the configuration process and reduce the software startup time, four open-source lossless compression decoders developed using high-level synthesis techniques are presented. Moreover,...
Language is a continuously adapting entity. As new modes of expression and ideas arise, humans are capable of extending the boundaries of language despite time-consuming and costly processes. Yet, the boundaries for processors are rigidly established upon manufacturing. A processor utilizing a static language such as an instruction set is unlikely to last long amongst rapidly advancing technologies,...
Pipelining has been applied in many area to improve performance by overlapping executions of computing stages. However, it is difficult to apply on H.264/AVC decoding in frame level, because the bitstreams are encoded with lots of dependencies and little parallelism is left to be explored. Even slice-level parallelism in H.264 is intuitive, because there is usually only one slice in a frame, it is...
With the development of communication, digital video compression technology turns into one of the most flourishing realm. In this paper the author introduces an AVS decoder design based on a multimedia chip-platform. In order to obtain the optimal performance, the structure of decoder adopts parallel algorithm with the centre processer and the coprocessor. The performance of the decoder which is about...
Interpretation and basic block translation (BBT) are two typical strategies for cold code emulation in a dynamic binary translation (DBT) system. More and more DBT systems employ BBT as the generated native code runs more efficient than the interpretation routines. We observe that BBT's high efficiency is based on those special hardware assists. With certain simple hardware techniques, interpretation...
Abstract- Dynamic binary translation (DBT) converts codes written for a source instruction set architecture (ISA) into optimized code for a target ISA. DBT has emerged as an important tool with real world applications. Interpretation is always adopted to handle the non hotspot code in a two stage DBT system. An important consideration in such DBT systems is the interpretation overhead. We investigate...
Recent research has shown that in mobile devices, energy efficiency of the total system does not scale at the same pace with the energy efficiency of the silicon. The reason has been attributed to overheads in software, and in the context of multi-media codecs a new approach has been proposed. In this approach hardware accelerators are scheduled quasi-statically thus decreasing the interfacing overhead...
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