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A comma detection and word alignment circuit is proposed for a 6.25-Gb/s SerDes. In order to achieve a high speed, a new architecture of combined parallel and pipelined is employed. Based on the proposed structure, a high speed comma detector is implemented using 0.18im CMOS technology. Post simulation result indicates that the circuit can operates up to 770MHz with a power consumption of 10.8 mW...
Synchronous pipelines usually have a fixed clock frequency determined by the worst-case process-voltage-temperature (PVT) analysis of the most critical path. Higher operating frequencies are possible under typical PVT conditions, especially when the most critical path is not triggered. This paper introduces a design methodology that uses asynchronous design to generate the clock of a synchronous pipeline...
The rate compatible punctured convolutional code (RCPC code) is an important module in Multi-band Orthogonal Frequency Division Multiplexing Ultra Wide Band (MB-OFDM-UWB) indoor positioning system introduced in this paper as a kind of useful channel coding to offer more protection against all kinds of channel noise under indoor channel environments. In this paper, RCPC code for MB-OFDM-UWB indoor...
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