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Although many efficient high-level algorithms have been proposed for the realization of Multiple Constant Multiplications (MCM) using the fewest number of addition and subtraction operations, they do not consider the low-level implementation issues that directly affect the area, delay, and power dissipation of the MCM design. In this paper, we initially present area efficient addition and subtraction...
In this paper we present an efficient decision procedure which can deal with modulo equivalence based on Horner-Expansion-Diagram (HED) as a canonical decision diagram in order to prove the equivalence of an AND-INVERTER-GRAPH (AIG) representation as the implementation against a polynomial expression over Z2n as the specification. In other words, even if the implemented polynomials are different in...
Datapath synthesis for standard-cell design goes through extraction of arithmetic operations from RTL code, high-level arithmetic optimizations and netlist generation. Numerous architectures and optimization strategies exist that result in circuit implementations with very different performance characteristics. This work summarizes the circuit architectures and techniques used in a commercial synthesis...
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