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Once largely the domain of space-borne applications, the effects of high energy charged particles on electronics systems are now also a concern for conventional terrestrial devices. The configuration memory within reconfigurable components, such as SRAM-based field-programmable gate arrays are particularly vulnerable to radiation-induced single event effects. We present a silicon on insulator (SOI)-based...
We present a Silicon-on-Insulator based circuit for use as configuration storage in a radiation hard reconfigurable system. A non-volatile storage cell, manufacturable in a standar single polysilicon SOI CMOS process with no special layers, is combined with a Schmitt sense amplifier such that the overall block exhibits two unique characteristics that enhance its resistance to radiation induced upsets...
The purpose of TAFT fault tolerance studies conducted at CNES is to prepare the space community for the significant evolution linked to the usage of COTS components for developing spacecraft supercomputers. CNES has patented the DMT and DT2 fault-tolerant architectures with 'light' features. The development of a DMT/DT2 testbench based on a PowerPC7448 microprocessor from e2v is presented in this...
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