The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
Multipliers requiring large bit lengths have a major impact on the performance of many applications, such as cryptography, digital signal processing (DSP) and image processing. Novel, optimised designs of large integer multiplication are needed as previous approaches, such as schoolbook multiplication, may not be as feasible due to the large parameter sizes. Parameter bit lengths of up to millions...
An AES is the most popular security algorithm and it is required to improve the performance of AES with increasing the demand of internet security. AES is a symmetric key algorithm in which only one key is requires for encryption and decryption process, key must be same. The AES implementation is possible for software and hardware but hardware implementation has better speed in comparison to software...
One of the major problems in communication is the secure transportation of data over communication protocols. This paper presents a feasible resolution for Rijindael's encryption and decryption using VHDL for FPGA (cyclone III) & ‘C’ running over Nios II processor. The Nios II is a versatile embedded processor which is high performance, of lower cost and power consumption, has low complexity combining...
One of the major problems in communication is the secure transportation of data over communication protocols. This paper presents a feasible resolution for Rijindael's encryption and decryption using VHDL for FPGA (cyclone III) & ‘C’ running over Nios II processor. The Nios II is a versatile embedded processor which is high performance, of lower cost and power consumption, has low complexity combining...
Fully Homomorphic Encryption (FHE) becomes an important encryption scheme in the frame of Cloud computing. Current software implementations are however very slow and require a huge computing power. This work investigates the possibility to accelerate FHE by implementing it in off-the-shelf FPGAs. The focus is on one critical function in the FHE scheme: the polynomial multiplication. In this paper,...
With the current evolution in run-time reconfigurable computing, runtime reconfigurable platforms are becoming increasingly viable. End users can download an updated version of a bitstream over the Internet and reconfigure the hardware platform partially without affecting the rest of the system like downloading and installing software. However, remote downloading and upgrading of bitstream is vulnerable...
1In the present investigation, Rijindael's encryption algorithm (AES) is designed based on co-design methodology. It is a commonly used network security algorithm for wireless transmission systems. It is a symmetric block cipher, which plays a major role in bulk data encryption. Four different modules with specific functions are included in this algorithm. The hardware / software co-design methodology...
1Time to market becomes a critical constraint in the context of increase in size and complexity of embedded system design. The paper presents a methodology for the interface of any custom hardware with the system designed around a soft core processor through general purpose input and output (GPIO). The custom hardware under consideration is Advanced Encryption Standard Algorithm (AES). An ‘AES,’ is...
Cryptographic technology is an important way to ensure information security, and is the kernel of information safety. Among all kinds of cryptographic algorithms the block cipher is of some virtues—the fast speed of encryption and decryption, the easy standardization, convenient implement by software and hardware, and so on. So the block cipher is the core parts of the data encryption, digital signature,...
Advanced Encryption Standard, a federal information processing standard is an approved cryptographic algorithm that can be used to protect electronic data. The AES can be programmed in software or built with pure hardware. However field programmable gate array offers a quicker and more customizable solution. This paper presents the AES algorithm with regard to FPGA and the very high speed integrated...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.