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This paper presents a CMOS low-dropout regulator (LDO) with a unique power supply rejection (PSR) boosting technique. A replica device is used to cancel the power supply noise at the output that is coupled through the main LDO parasitic. The proposed LDO employs a mid-ranged output decoupling capacitor of 50nF and a comparatively low-complexity circuitry to achieve the supply rejection target while...
The design of an integrated CMOS cascoded operational amplifier with two differential input stages is described. By using the nested Miller compensation the stability of the operational amplifier is ensured. The layout has been created automatically by using the ALADIN tool [6–9] and prototype circuits have been fabricated. The small signal model for the amplifier is depicted and the test results...
In this work, the bulk-gate controlled circuit to improve the power supply ripple ratio (PSRR) of a Low Dropout Regulator (LDO) which deteriorates due to lowering power consumption is proposed. Designing with 0.25 mum CMOS process, the simulation results by HSPICE shown that the proposed circuit provides a high performance of PSRR even though 1/10 of the power consumption is reduced compare to the...
This paper describes a comparative analysis between two topologies of operational amplifiers to design a 40 MS/s 12-bit pipeline analog to digital converter (ADC). The analysis includes AC and transient simulation to select the proper topology. This ADC is implemented in a 0.35 mum AMS CMOS technology with 3.3 V single power supply. The capacitors and selected operational amplifiers were scaled for...
Class D amplifiers are becoming the most feasible solution for embedded audio application. However, distortions due to the non-linear nature of switching stage are the main drawback for this amplifier topology. This paper discusses the design and implementation of high fidelity audio class D using sliding mode control scheme. This design method proves to be a cost effective solution for industrial...
A high intercept points, cost-effective, and power-efficient switching FET double balanced mixer (DBM) is reported. The Switching FET DBM demonstrated in this work offers input intercept points (IIP3) and conversion loss typically 44 dBm and 8.5 dB respectively with 15 dBm LO power for the frequency band (RF: 900-2150 MHz, LO: 850-1950 MHz, IF: 50-200 MHz). The measured interport isolation is typically...
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