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This paper presents a double-balanced CMOS down-conversion mixer for 60-GHz receivers, although the mixer is designed specifically for a phased array receiver architecture. The proposed mixer uses two on-chip baluns implemented with the two top metal layers in a 0.13-μm CMOS technology. The baluns provide 180° differential outputs from applied single-ended input at the radio-frequency (RF) and local-oscillator...
A sub-harmonic passive mixer for WiBro (2.3~2.4GHz) in 0.18 ??m CMOS process has been designed. The circuit includes a differential phase splitter for the LO circuit. This architecture have a low flicker noise (20.29Hz) and a good double sideband noise figure (9.29dB) while demanding little power consumption. The input referred 1-dB compression point is -4.3dBm, IIP2 is 33.12dBm and IIP3 is -3.44dBm...
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