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Recently, GPU has evolved into a highly parallel, multithreading, many core processor with tremendous computational capability and very high memory bandwidth. At the same time, multi-core CPU evolution continued and today's CPUs have 4-8 cores which offer dramatically increased performance and power savings characteristics. We are aware of very few works that consider both devices cooperating to solve...
The on-chip communication architecture presented in this paper, NeuroNoC, addresses the problems arising in large multi-core systems where global or local routing strategies do not work efficiently anymore since they either do not scale or lack information on the network state. Our communication architecture is runtime adaptive and it deploys a distributed artificial neural network to aid routing...
Multi-processor Systems-on-chip are currently designed by using platform-based synthesis techniques. In this approach, a wide range of platform parameters are tuned to find the best trade-offs in terms of the selected system figures of merit (such as energy, delay and area). This optimization phase is called Design Space Exploration (DSE) and it generally consists of a Multi-Objective Optimization...
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