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SOI FinFET transistors have emerged as novel devices having superior controls over short channel effects (SCE) than the conventional MOS transistor devices. However despite these advantages, these also exhibit certain other undesirable characteristics such as corner effects, quantum effects, tunneling etc. Usually, the corner effect deteriorates the performance by increasing the leakage current. In...
This paper describes a single pole, single throw (SPST) 180 nm CMOS thin film SOI switch developed for the most difficult cellular and 802.11x RF switch applications. We will show that power handling, linearity, insertion loss, isolation and switching times are competitive with switch applications utilizing GaAs pHEMT and silicon- on-sapphire technologies.
The paper presents a logic interconnect device (LED) to model digital circuit with near back-end-of-line (BEOL) effect, and to measure system performance. It is driven by a product inverter-based logic circuit, and it is loaded with near-BEOL wiring. The LID ring oscillator is measured and analyzed in 65 nm SOI CMOS. The methodology offers in-situ characterization of near-BEOL interconnect parasitics,...
This paper describes a 180 nm CMOS thin film SOI technology developed for RF switch applications. For the first time we show that the well-known harmonic generation issue in HRES SOI technologies can be suppressed with one additional mask. Power handling, linearity, and Ron*Coff product are competitive with GaAs pHEMT and silicon-on-sapphire technologies.
Silicon-based technology is now able to address new applications such as Wireless HDMI. Performances of CMOS and BiCMOS transistors enable RF designers to integrate the entire front-end. The last building block of the integration is the antenna. A folded-slot antenna and 4-antenna linear array layouts on HR SOI silicon using standard CMOS process BEOL are described. In this paper, return loss and...
A /spl Sigma//spl Delta/ modulator designed specifically for extended temperature applications is reported. The design is fabricated in a 3.3-V 0.5 /spl mu/m SOS-CMOS process and incorporates a 2-2 cascade architecture allowing operation as either a 2/sup nd/- or 4/sup th/-order modulator. Experimental data for both modulator configurations are presented including dynamic range (or effective resolution),...
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