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Discrete cosine transform (DCT) is one of the major operations in various image/video compression standards. This paper implements DCT and its inverse (IDCT) on our proposed Mat-Core processor using scalar/vector/matrix instruction sets. Mat-Core extends a general-purpose scalar processor with a matrix unit for processing vector/matrix data. The extended matrix unit is decoupled into two components...
Clock acceleration and ILP extraction have drastically improved processor performance. However, the performance of memory has not improved as much as that of processors, thus the problem of performance gap between memory and processor, which is called the memory wall problem, is becoming very serious. This will become more serious in the near future. We propose a new VLSI architecture which can solve...
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