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This paper presents a structure of millimeter-wave (mmW) on-chip transmission line using redistributed thick copper wires with ground shields. All the layers from standard BEOL layers to the aluminum pad layer can be selected as the ground shield. From electromagnetic field simulations and measurements up to 80 GHz, we prove that global-copper-wire ground shields produce minimum attenuation: less...
Nonlinear transmission lines (NLTLs) are used in diverse applications such as edge-sharpening, pulse generation, and frequency conversion, however, length of a useful NLTL can require significant MMIC or RFIC real estate. We present an analytical model for the complex propagation constant of lossy, distributed NLTLs and fabricate several NLTLs in 0.25 mum CMOS for verification. Space-saving layout...
Coplanar waveguide transmission lines and vertical interconnects are implemented on a thick (15 mum) Parylene-N dielectric layer over a lossy CMOS-grade Si substrate. Devices are measured up to 40 GHz and show very low loss behavior. Low loss tangent and low dielectric constant characteristics of Parylene-N result in significant improvement of transmission lines and interconnects compared to those...
We present design aspects and techniques for millimeter-wave circuits implemented in 65-nm CMOS. Different transmission line topologies are discussed and measurement results for a conventional coplanar waveguide and slow-wave coplanar waveguide implemented in 65-nm CMOS are shown. The attenuation of the on-chip transmission lines can be reduced by using slow-wave coplanar waveguides. A 1-stage cascode...
This paper discusses the design of a 60 GHz low noise amplifier (LNA) using a standard low power SOI CMOS process from ST Microelectronics. First, we outline the technology as well as the mm-wave design challenges. Using recent work on coplanar waveguide (CPW) modeling, we describe how it's possible to use parametric, 3D electromagnetic simulation to complete or replace analytical models of on-chip...
This paper presents designs and measurements of distributed amplifiers (DAs) processed on a 130-nm silicon-on-insulator CMOS technology on either standard-resistivity (10 Omegamiddotcm) or high-resistivity (>1 kOmegamiddotcm) substrates, and with either body-contacted (BC) or floating-body (FB) MOSFETs. Investigations have been carried out to assess the impact of active device performance and transmission...
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