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An optimization scheme for minimizing substrate losses in coplanar strips (CPS) transmission line on CMOS grade low resistivity silicon substrate with SU-8 polymer as dielectric interface layer, is presented. It is shown that through careful selection of CPS linewidth, the substrate losses can be sufficiently reduced for a given dielectric layer thickness. For a 100 ?? CPS line with SU-8 polymer as...
Coplanar waveguide transmission lines and vertical interconnects are implemented on a thick (15 mum) Parylene-N dielectric layer over a lossy CMOS-grade Si substrate. Devices are measured up to 40 GHz and show very low loss behavior. Low loss tangent and low dielectric constant characteristics of Parylene-N result in significant improvement of transmission lines and interconnects compared to those...
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