The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
With continuous scaling of VLSI technology, coupling capacitance between interconnects lines need more accurate transmission line modelling, requiring the introduction of self and mutual inductances. Self and mutual inductances can cause for crosstalk noise and delay between high speeds VLSI interconnects. This paper presents an mathematical computation of crosstalk noise of ‘L’ Type RLC global interconnects...
This paper presents a delay and crosstalk noise model for coupled resistance-inductance-capacitance (RLC) on-chip interconnects. The proposed algorithm, based on a modified Lie formula, is used to convert the solution of the transmission line network into delay algebraic equations to obtain the time domain response. The proposed algorithm is not limited to fixed number of coupled RLC lines or to specific...
With technology scaling, vulnerability to soft errors in random logic is increasing. There is a need for on-line error detection and protection for logic gates even at sea level. The error checker is the key element for an on-line detection mechanism. We compare three different checkers for error detection from the point of view of area, power and false error detection rates. We find that the double...
This paper proposes a new approach to analyze crosstalk of coupled interconnects in the presence of process variations. The suggested method translates correlated process variations into orthogonal random variables by principle component analysis (PCA). combined with polynomial chaos expression (PCE), the technique utilizes Stochastic Collocation Method (SCM) to analyze the system response of coupled...
As integrated circuits (ICs) are scaled into nanometre dimensions and operate in gigahertz frequencies, interconnects have become critical in determining system performance and reliability. In this paper we propose a new approach to investigate crosstalk reduction techniques using Silicon On Insulator (SOI) substrate. Coupling through common silicon substrate has become an important limiting factor...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.