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We present a new model order reduction technique for electrically large systems with delay elements, which can be modeled by means of neutral delayed differential equations. An adaptive multipoint expansion and model order reduction of equivalent first order systems are combined in the new proposed method that preserves the neutral delayed differential formulation. An adaptive algorithm to select...
This paper deals with global synchronization in arrays of coupled delayed Lur'e systems with nonlinear couplings, in which the interval variable delay is treated. Together with Krasovskii-Lyapunov functional method and Kronecker product technique, two novel synchronization criteria are presented in terms of linear matrix inequalities (LMIs) based on generalized convex combination, in which the conditions...
In this paper, we propose models for single and coupled on-chip global interconnect lines by distributed RLGC parameters using state space approach. Models for single and coupled lines are validated by comparing with SPICE simulations. Interconnect performance metrics are obtained from the proposed models for 65 nm, 90 nm, 130 nm and 180 nm technology nodes based on PTM values. In case of coupled...
This paper proposes a new approach to analyze crosstalk of coupled interconnects in the presence of process variations. The suggested method translates correlated process variations into orthogonal random variables by principle component analysis (PCA). combined with polynomial chaos expression (PCE), the technique utilizes Stochastic Collocation Method (SCM) to analyze the system response of coupled...
Current mode (CM) scheme provides suitable alternative for the high speed on-chip interconnect signaling. This paper presents a energy-delay optimization methodology for the current-mode (CM) signaling scheme. Optimization for the CM circuits for on-chip interconnects requires a joint optimization of driver and receiver device sizes, as their parameters which affect the energy-delay performance depend...
A novel methodology for accurate and efficient static timing analysis is presented in this paper. The methodology is based on finding a frequency domain model for the gates which allows uniform treatment of the gates and interconnects. It is shown that despite the highly nonlinear overall gate model, a frequency domain model of the gate with the model parameters, gate moments, as functions of the...
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