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An integrated cryptographic processor for public key cryptography for embedded systems is proposed in this contribution. The architecture is designed for computational intensive applications based on hyperelliptic curve cryptography (HECC) in the automotive domain. Authentication protocols based on HECC can be adapted for access control systems and demobilizer applications in today's cars. They can...
This paper gives a way of implementing a high-speed and reliable data conversion between UART and WLAN. After introducing the overview of our system, this paper shows the hardware structure and firmware design in brief. Then we analyze the bottleneck of the data conversion and give a way of how to improve and optimize the firmware to complete a high speed and reliable data conversion in detail. We...
Upgradeability and interoperability are main concerns of Software Defined Radio (SDR). But in the case of military applications, security is also a relevant aspect of SDR. The Secure Software Communication Architecture (SSCA) is a standardized solution to secure SDR. This architecture needs a cryptographic processor for security purposes. However, currently available SSCA compliant ASIC-based cryptoprocessors...
In this paper we present a design methodology for the identification and development of a suitable hardware platform (including dedicated hardware accelerators) for the data plane processing of the LTE protocol stack layer 2 (L2) in downlink direction. For this purpose, a hybrid design approach is adopted allowing first investigations of future mobile phone platforms on the system level (using virtual...
We reduce the required trusted computing base for direct recording electronic (DRE) voting machines with a design based on trusted platform modules (TPMs). Our approach ensures election data integrity by binding the voter's choices with the presented ballot using a platform vote ballot (PVB) signature key managed by the TPM. The TPM can use the PVB key only when static measurements of the software...
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