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A low-power down-converter that uses a passive current-commutating mixer for frequency translation, while sharing the bias current between the RF and baseband stages is presented. An active noise shaping network is implemented to reduce low-frequency noise at the output. Linearity is enhanced through the use of non-linear feedback. The design, implemented in a 0.18 μm CMOS technology, achieves conversion...
This paper presents a low power, UWB up-conversion mixer, designed on CMOS 0.13 μm technology. This circuit is based on a double balanced Gilbert topology, which uses a feedback loop in its transconductance stage; in order to match the IF input impedance over a 10-510 MHz frequency range. This mixer exhibits a 0 dB conversion gain, a 7 dB noise factor, a DC power in the range of 4.2 mW and can output...
This paper presents the analysis and design of a low power and highly linear mixer topology based on the differential derivative superposition method. The analysis focuses on both nonlinearity and noise performance. The linearisation mechanism is investigated in terms of Taylor series and Volterra series. A prototype mixer has been designed and is to be implemented in 0.18 mum CMOS technology. Simulation...
In this paper a low-power design of an integrated RF receiver for Wireless Sensor Networks (WSNs) in 90 nm CMOS technology is proposed. The receiver is IEEE 802.15.4 physical specifications compliant. It is designed to operate in ISM band at 2.45 GHz center frequency. Target devices for this kind of transceiver are low-cost battery powered smart embedded devices and sensors. The receiver is designed...
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