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A process integration of e-beam lithography, plasma etching, and Si processing have been developed to pattern Si nanowires on crystalline Si on insulator wafers. Si nanowires of 12-50 nm linewidth, 30-70 nm height, and 10 mum length have been made. Using these Si nanowires as conducting channels, field effect transistors using the back Si substrate as gate have been fabricated. Good I-V characteristics...
Selective emitter formation in silicon based solar cell is recently becoming a common technique to enhance the blue response of solar cell. In this work, we suggest a novel procedure based on a self alignment thought to overcome the realignment problems that still limit its industrial request. The idea is based on a plasma dry etching procedure of the emitter region using the metal grid of the cell...
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