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Three-dimensional (3-D) integration technologies using through-silicon vias (TSV's) are described. We have developed a 3-D integration technology using TSV's based on a wafer-to-wafer bonding method for the fabrication of new 3-D LSIs. A 3-D image sensor chip, 3-D shared memory chip, 3-D artificial retina chip and 3-D microprocessor test chip have been fabricated by using this technology. In addition,...
We demonstrate two types of three-dimensional (3D) integration using chip self-assembly techniques with liquid surface tension. In reconfigured wafer-to-wafer 3D integration, many different sizes of chips having In/Au microbumps with/without TSV (through-silicon via) were temporarily placed by self-assembly on a reconfigured wafer in a back-to-face manner. The many chips can be then simultaneously...
A three-dimensional (3-D) integration technology based on the wafer-to-wafer bonding has been developed. Various kinds of 3-D LSI test chips such as 3-D microprocessor chip have been fabricated by using this technology. In addition, we have developed a new 3-D integration technology called super-chip integration based on the reconfigured wafer- to-wafer bonding in which the reconfigured wafers are...
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