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Silicon nanowire (SNW) field-effect transistors (FETs) have proven an emerging highly sensitive bio/chemical sensor due to their huge surface-to-volume ratios. However, fabrication of SNWs with both high output and low cost is still challenging. This paper presents a new fabrication method using sidewall mask technology. By depositing a conformal thin film on a sacrificial pattern and removing the...
Field-effect transistors (FETs) are commonly used as affinity-based electrical transducers, known as bioFETs. These sensors are, however, unable to directly detect uncharged molecules such as glucose, necessitating the use of ligand molecules. Further, the change of the electrical signal resulting from the biochemical reactions is often small. In the past decade, significant research was done to enhance...
In this work we present an experimental study of the electromechanical behavior of suspended, taut, single walled carbon nanotubes (SWCNTs). A novel top-down fabrication process was developed in order to integrate the suspended SWCNTs into silicon MEMS structures fabricated using conventional micro-machining techniques. The resonant response of suspended SWCNTs under a time-varying electric field...
In this work, we present a simple fabrication method of ion sensitive field effect transistor (ISFET) using cost effective equipments in a cleanroom laboratory environment. The ISFET has a structure similar to that of a metal oxide semiconductor field effect transistor (MOSFET) except without the metal layer on top of the gate oxide and uses silicon nitride insulating layer as the ion sensing material...
Polymorphic gates can be considered as a new reconfigurable technology capable of integrating logic functions with sensing in a single compact structure. Polymorphic gates whose logic function can be controlled by the level of the power supply voltage (Vdd) represent a special class of polymorphic gates. A new polymorphic NAND/NOR gate controlled by Vdd is presented. This gate was fabricated and utilized...
In this paper, we present a new technique to improve the reliability of H-tree SRAM memories. This technique deals with the SRAM power-bus monitoring by using built-in current sensor (BICS) circuits that detect abnormal current dissipation in the memory power-bus. This abnormal current is the result of a single-event upset (SEU) in the memory and it is generated during the inversion of the state of...
This paper introduces a novel current sense amplifier (CSA) in sub-32nm fully depleted (FD) double-gate (DG) silicon-on-insulator (SOI) technology with planar independent self-aligned gates. A new architecture is proposed which takes advantage of the back gate in order to improve circuit properties. Compared to the reference circuit, the new architecture proves to be faster (21% sensing delay decrease),...
Design and characterization of a new generation of single-photon avalanche diodes (SPAD) array, manufactured by ST-Microelectronics in Catania, Italy, are presented. Device performances, investigated in several experimental conditions and here reported, demonstrate their suitability in many applications. SPADs are thin p-n junctions operating above the breakdown condition in Geiger mode at low voltage...
In deep submicron era, to prevent larger amount of SRAM from more frequently encountered overheating problems and react accordingly for each possible hotspots, multiple ideal run-time temperature sensors must be closely located and response rapidly to secure system reliability while maintaining core frequency. This paper presented a method to extract run-time temperature information from multiple...
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