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This paper introduces flexible radio techniques inside integrated circuits in order to tackle the interconnect issue for many-core chips. We propose to take benefits from OFDMA for a RF-interconnect associated to a carrier allocation policy and adaptive modulation. A 20 GHz bandwidth is shared between 32 tile sets made of 32 tiles of 4 cores each, for a 4096 cores chip. We adopt a cognitive radio...
This paper presents a fully integrated CMOS 60-GHz transceiver chipset for short-range and high-speed wireless communication. The target application of the short-range communication is less than 5-cm communication distance and more than 2-Gb/s throughput for file transfer. In order to achieve file transfer, physical (PHY) layers with error packet correction and media access control (MAC) layer with...
This paper describes a 2.5G cellular transceiver with standard DigRF interface, implemented in a low-cost 0.13mum CMOS process. This is the first CMOS single-chip, polar closed-loop transmitter, excluding the power amplifier (PA). This transmitter achieves an efficiency of 26% in EDGE mode by linearizing a saturated PA in a closed-loop feedback system. This is much higher than the typical 15-to-18%...
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