The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
This paper presents the design and realization of a large capacity airborne waveform recorder for UWB (ultra wide band) system based on FPGA and Flash array. The system has 80 MT29F64G08AJABA NAND Flash Memory chips and provides a total 640GB storage capacity. With ADC working at 100MHz, the storage time can be more than 100 minutes. For offline data analysis, the system provides a Gigabit interface...
To make the FPGA configuration more flexible and easier, this article designs a SPI FLASH-based FPGA dynamic reconfiguration method according to the principle of FPGA configuration. In the paper, some of the key technologies in software design are analyzed and solved. Besides, the design has been verified on the hardware platform as well. The results show that this design is reasonably practicable...
Timing sequence test is a core part for missile ground testing, the results directly determine whether the missile can be well launched. A specialized CPCI timing sequence testing system for missile is presented in this paper, which is able to complete the sequence test of tail boot, gesture controller, sequence circuit, instant flight for both equivalent device and actual missile. Also, the design...
High-speed image capture technology is widely used in image signal transmission, processing, pattern recognition and industrial control. LVDS signal transmission technology and Hotlink transmission technology are two kinds of image signal transmission method who has been widely used in different areas because its own strengths. Because of its high-speed and strong interference immunity, LVDS signals...
In order to meet the needs of measurement of high-speed target, the timing sequence of LUPA300, an array CMOS image sensor of CYPRESS, is analyzed. The driving timing and control software is designed for the array CMOS sensor. High speed CMOS imaging system, whose hardware platform is FPGA, is emphasized. Real-time non-uniformity correction for CMOS sensor is implemented in the output stage. The experimental...
All public key cryptosystems, though being highly secure, have a common drawback: They require heavy computational effort. This is due to the reliance on modular multiplication of large operands (1024 bits or higher). The same problem arises in data encryption/decryption and digital signature schemes. Examples of such cryptosystems are RSA, DSA, and ECC. Now considering embedded platforms for applications...
This paper presents principles and results of dynamic testing of an SRAM-based FPGA using time- resolved fault injection with a pulsed laser. The synchronization setup and experimental procedure are detailed. Fault injection results obtained with a DES crypto-core application implemented on a Xilinx Virtex II are discussed.
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.