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Harvesting energy from ambient energy sources such as solar and thermal gradients is one solution to address the dramatic increase in energy consumption of personal electronics. In this paper, an ultra low quiescent current charger and battery management IC that can efficiently extract energy from solar panels and thermoelectric generators to charge batteries and super capacitors is presented. While...
A Quantum-Well Infrared Photodetector Focal Plane Array Read-Out Integrated Circuit Unit Cell (QWIP-FPA ROIC unit cell) is prototyped and characterized. The implemented architecture was the source-follower direct injection (SFDI) which presents high linearity, reduced area and high integration time capability. Details of its behavior, as well as secondary effects, are discussed from the experimental...
This paper presents a CMOS reconfigurable translinear cell intended to be part of a field programmable analog array. The cell is composed of a recently developed wide dynamic range translinear element and programmable current sources, current mirrors and capacitors. An FPAA built with this cell is able to implement the most common primitives of translinear design, such as, multiplication, division...
This document presents a compilation of results from tests performed by iRoC Technologies on SER induced by alpha particles on SRAM memories for technology nodes from 180 nm to 65 nm. The aim of this study is to establish the variation of sensitivity with technology node for SEU and MCU, and to analyze the possible influence of different designs and technological parameters at a given technology node.
A delay-locked loop of multi-band selector with wide-locking range and low power dissipation is presented. The architecture of the proposed delay-locked loop consists of phase frequency detector, charge pump, band selector, multi-control delay line, and start-up circuit. The multi-band selector is used to extend operation frequency of delay-locked loop by switching the multi-control delay line. The...
This paper describes a comparative analysis between two topologies of operational amplifiers to design a 40 MS/s 12-bit pipeline analog to digital converter (ADC). The analysis includes AC and transient simulation to select the proper topology. This ADC is implemented in a 0.35 mum AMS CMOS technology with 3.3 V single power supply. The capacitors and selected operational amplifiers were scaled for...
The next generation of wireless communication is a ubiquitous radio system concept, providing wireless access from short-range to wide-area, with one single reconfigurable and adaptive system for all envisaged radio environments. This paper presents the design approach of RCO (reconfigurable concurrent oscillator) that simultaneously generates two or more signals of different frequencies that eliminate...
A high intercept points, cost-effective, and power-efficient switching FET double balanced mixer (DBM) is reported. The Switching FET DBM demonstrated in this work offers input intercept points (IIP3) and conversion loss typically 44 dBm and 8.5 dB respectively with 15 dBm LO power for the frequency band (RF: 900-2150 MHz, LO: 850-1950 MHz, IF: 50-200 MHz). The measured interport isolation is typically...
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