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This paper presents a current-mode analog multiplier/divider based on current conveyors. The proposed circuit employs only two second-generation current conveyors with controlled current gains (KCCIIs). The circuit is active only; it does not require any external passive element. Then, it is suitable for implementation as integrated circuit. The proposed circuit can perform as either a four-quadrant...
IBIS4.2 (I/O Buffer Information Specification) standard describes the hysteresis behavior from one simulation point to the other. In an analog simulator, solution is obtained based on multiple iterations in between simulation points. These iterations can lead to undesired behavior. The common problem that might be encountered with this specific behavior in an analog simulator due to iterations will...
Simultaneous switching noise (SSN) is an important issue for the design and test and actual ICs. In particular, SSN that originates from the internal logic circuitry becomes a serious problem as the speed and density of the internal circuit increase. In this paper, an on-chip monitor is proposed to detect potential logic errors in digital circuits due to the presence of SSN. This monitor checks the...
With technology scaling, vulnerability to soft errors in random logic is increasing. There is a need for on-line error detection and protection for logic gates even at sea level. The error checker is the key element for an on-line detection mechanism. We compare three different checkers for error detection from the point of view of area, power and false error detection rates. We find that the double...
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