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In this paper, we propose a method for the multi-objective mapping of applications onto matrix-based nanocomputer architectures. These architectures are composed from reconfigurable logic cells interconnected according to a given topology. The power consumption and data propagation delay of each cell depend on its internal function, e.g. NAND, OR, etc. By taking into account these cell characteristics,...
As technology scales, leakage power shares a dominant part in the total power dissipation of the chip and reaches up to 50% or even higher at elevated temperatures in 45 nm technology. Leakage power dissipation is especially problematic for FPGAs due to their reconfigurable nature and large number of inactive resources. Body biasing is an efficient technique to reduce leakage current which has been...
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