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This paper presents a 32.8MHz low power, supply insensitive monolithic CMOS relaxation oscillator. Instead of using voltage-mode comparators for cycle-to-cycle capacitor voltage swing (CVS) threshold voltage comparison, the CVS is regulated by a low-power closed-loop control which consists of a current-controlled delay cell (CCDC), a Gm-C error integrator and a comparator-free switch logic block....
An on-chip frequency reference is designed for low-power, low-cost, and fully integrated system-on-chip designs. In this relaxation oscillator, pseudodifferential architecture is used to eliminate frequency variation caused by bias current, and interleaving capacitors are implemented to extend its discharge time. A low-leakage programmable switch array (PSA) trimming method is proposed to calibrate...
The paper presents an interface circuit for capacitive sensors that are shunted by a parasitic leakage conductance and which are grounded at one of their electrode terminals. The electronic circuit is designed based-on the use of a relaxation oscillator. In the designed interface, the effect of shunting conductance is reduced by using the charge/discharge-balanced method. The parasitic effects of...
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