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A new low-jitter polyphase-filter-based frequency multiplier incorporating a phase error calibration circuit to reduce the phase errors is presented. Designing with a multiplication ratio of eight, it has been fabricated in a 0.13-mum CMOS process. For input frequency of 25 MHz, the measured jitter is 2.46 ps (rms) and plusmn9.33 ps (pk-pk) at 200-MHz output frequency, while achievable maximum static...
A 53 dB gain limiting amplifier for OC-192 and 10 GbE applications is developed in a 50 GHz fT SiGe SOI complimentary bipolar process, and has 5 mV pk-pk sensitivity, 1.25 V pk-pk maximum input signal, 14 ps (20/80%) rise/fall times and 450 mV pk-pk output into matched differential 50 Ohm loads, consuming 430 mW on a 3.3 V supply. Input Cherry-Hooper gain stages limit the -3 dB bandwidth to 11 GHz...
A novel compact coupled planar resonator (CCPR) based VCO (voltage controlled oscillator) using mode-coupling technique was developed in response to expensive high Ceramic and SAW resonators based signal source for wireless communications. One of the problems related to the conventional Ceramic/SAW based resonators (with high Q and low phase noise) is the challenge for integration in IC form. Instead...
Microstrip Antennas (MSAs) consist of a metallic radiating patch on one side of thin dielectric substrate and other side is ground plane. Most important advantages of MSAs are low profile, light weight and compatibility with integrated circuit technology. MSAs are used in mobile communication, satellite communication, radar, direct broadcasting, global positioning systems and remote sensing. The major...
The major limitations of microstrip antennas (MSAs) are their narrow impedance bandwidth, small gain and low power handling capability. A half U-slot MSA with shorting wall has been designed and experimentally verified. Its center frequency is observed at 2.66 GHz. The bandwidth is 688 MHz and percentage bandwidth is 25.6% has been obtained while radiation efficiency is above 94% for the operating...
A high intercept points, cost-effective, and power-efficient switching FET double balanced mixer (DBM) is reported. The Switching FET DBM demonstrated in this work offers input intercept points (IIP3) and conversion loss typically 44 dBm and 8.5 dB respectively with 15 dBm LO power for the frequency band (RF: 900-2150 MHz, LO: 850-1950 MHz, IF: 50-200 MHz). The measured interport isolation is typically...
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