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The article designed a military grade switchboard with Gigabit POE power capacity through 5 ports by researching switch principle and actual requirement. Firstly, the whole circuit and associated systems were introduced. Secondly, the circuit which used network management chip 88E6161 of Marvel Company and microcontroller chip PD69104B of Micro-semi Company was designed and emulated, the specific...
As the number of Internet users increases, network devices are required to achieve power savings. For this purpose, the authors proposed a Gigabit Ethernet link rate switching method based on the destination IP address for typical networks in small offices or at home. However, this method has a problem in that the communication is interrupted for a few seconds when the link rate is switched. To solve...
Several papers propose approaches based on power state machines (PSMs) for modelling and simulating the power consumption of system-on-chips (SoCs). However, while they focus on the use of PSMs as the underlying formalism for implementing dynamic power management techniques, they generally do not deal with the basic problem of generating PSMs. In most of these papers, PSMs just exist, in some cases...
This paper proposes an energy-aware packet delivery operation through network node clustering for green communications. Energy consumption has become a key factor for the evaluation of performance index in telecommunication industry. In order to prevent a waste of energy in wired network, the proposed algorithm configures energy-aware cluster consisting of one header node and multiple member nodes...
We consider the problem of minimizing the power consumption of IP core networks by means of power-aware design and auto-configuration of the Points of Presence (PoPs), given general traffic demands on the links. Although the problem is in general NP-complete, we give an optimal algorithm for an important variant in which the number of ports on each line-card chassis is 2. For the general problem,...
We propose Energy Watermark Algorithm (EWA), an adaptive algorithm to reduce power consumption in Internet Protocol (IP)-over-Wavelength Division Multiplexing (WDM) networks. Our solution wisely adapts the set of powered on line cards to the actual traffic demand. In particular, EWA trades between network power consumption and Quality of Service (QoS) by changing the level of overprovisioning of the...
In this work we propose the routing standby model to save energy in an IP networks during low traffic hours. This model is based on the ability to put in standby mode all the IP processing functionalities of a network node. The main feature of this model is to save a great amount of energy, about the 50% of the total power consumption of a router, avoiding the drawback of a classical node standby,...
Growing concern for reduced power dissipation, cost and latency demands in next generation Data Centers (DC) motivates us to revisit header optimizations. Headers contribute to about 30–40% of DC traffic and is responsible for equal proportion of consumed power. This amounts to significant overhead on per byte transfer of payload. In the past, highly inflexible switches have limited the focus of header...
FPGA and ASIC design based on SoC technology have been widely used in the embedded systems. A flexible interconnection scheme is crucial in SoC design. In this paper, we adopt the Wishbone bus to interconnect a variety of devices due to its open architecture and many a free IP core with a Wishbone interface supplied by OpenCores organization. In general SoC system, a single bus interconnects all devices...
Processor allocation in todays many core MPSoCs is a challenging task, especially since the order and requirements of incoming applications are unknown during design stage. To improve network performance, balance the workload across processing cores, or mitigate the effect of hot processing elements in thermal management methodologies, task migration is a method which has attracted much attention...
With the advance of ubiquitous society including IPv6, it is expected that everything will be connected to the networking environment. Then, a ubiquitous grid networking environment (uGrid) has been proposed. In uGrid, everything from a device to a program is defined as “Service-Part”, and new mash-up services can be provided by connecting several ServiceParts. In this paper, IP Routing/Signaling-based...
We studied the deployment of TDM-XCs in power-efficient multilayer networks by utilizing Integer Linear Programming. Simulation results show that TDM-XCs are power-efficient and that intelligent deployment of TDM-XCs conserves great power for multilayer networks.
We estimate potential energy savings in IP-over-WDM networks achieved by switching off router line cards in low-demand hours. We compare three approaches to react on dynamics in the IP traffic over time, FUFL, DUFL and DUDL. They provide different levels of freedom in adjusting the routing of lightpaths in the WDM layer and the routing of demands in the IP layer. Using MILP models based on realistic...
High throughput chip-level integration of communicating heterogeneous elements (CLICHE) architecture to achieve high performance networks on chip (NoC) is proposed. The architecture increases the throughput of the network by 40% while preserving the average latency. The area of high throughput CLICHE?? switch is decreased by 18% as compared to CLICHE?? switch. The total metal resources required to...
A fully power aware globally asynchronous locally synchronous network-on-chip circuit is presented in this paper. The circuit is arranged around an asynchronous network-on-chip providing a 17 Gbits/s throughput and automatically reducing its power consumption by activity detection. Both dynamic and static power consumptions are globally reduced using adaptive design techniques applied locally for...
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