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A fully differential feedback third-order continuous-time sigma-delta modulator suitable for Mega Hertz wireless communication is presented. Some design optimizations mainly regarding power consumption are demonstrated. The proposed single-bit modulator clocked at 128 MHz achieves 2 MHz signal bandwidth, 11 bits of resolution, 68 dB signal-to-noise ratio and 66 dB dynamic range. Designed in 0.18 μm...
In this paper, the switching and short-circuit power consumption and the operating frequency of the extended true single-phase clock (E-TSPC) based divide-by-2/3 prescaler is investigated. Based on this analysis, a new ultra low power wide band 2/3 prescaler is proposed and implemented using a GlobalFoundries 0.18 μm CMOS technology. Compared with the existing E-TSPC architectures, the proposed 2/3...
An injection-locked frequency divider (ILFD) designed for Ka-band millimeter-wave applications has been implemented in 0.18 ??m CMOS process with a wide locking range and a low power consumption. Based on the circuit topology of the differential injection with combining the tail-and the direct injectors, the locking range can efficiently be enhanced. Comparing with the conventional ILFD circuits only...
In this study, we demonstrated low power and low phase noise of the complementary cross-coupled voltage-controlled oscillators (VCOs). Two chips are implemented by TSMC standard 0.18-mum complementary metal-oxide semiconductor (CMOS) process. The first one that employed a memory reduction tail transistor technique is operated from 5.17 to 5.85 GHz at a supply voltage of 1.2 V whereas its tuning range...
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