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In this paper, the switching and short-circuit power consumption and the operating frequency of the extended true single-phase clock (E-TSPC) based divide-by-2/3 prescaler is investigated. Based on this analysis, a new ultra low power wide band 2/3 prescaler is proposed and implemented using a GlobalFoundries 0.18 μm CMOS technology. Compared with the existing E-TSPC architectures, the proposed 2/3...
Widespread ubiquitous sensing systems require intensive research to develop low-cost sensor nodes maximizing energy efficiency. This paper presents the design and implementation of a CMOS voltage-to-frequency converter (VFC) part of a multi-sensor front-end signal conditioning system targeting wireless sensor networks applications. The proposed VFC, suitable to be directly interfaced to the microcontroller,...
A fully integrated 3.2 to 10 GHz multi-band QVCO for UWB low data rate (LDR) communication is presented in this paper. The QVCO design supports all channel frequencies of the IEEE 802.15.4a standard which consists of 8 high band channels between 6-10 GHz and 3 low band channels between 3-5 GHz. The QVCO generates 6.4-10.3 GHz covering all high band carrier frequencies while the low band carrier frequencies...
An injection-locked frequency divider (ILFD) designed for Ka-band millimeter-wave applications has been implemented in 0.18 ??m CMOS process with a wide locking range and a low power consumption. Based on the circuit topology of the differential injection with combining the tail-and the direct injectors, the locking range can efficiently be enhanced. Comparing with the conventional ILFD circuits only...
This paper presents a programmable frequency divider based on standard cell for digital video broadcasting-terrestrial (DVB-T) and other modern communication systems. As one of the components of PLL frequency synthesizer, this PFD cooperating with a dual-modulus prescaler can realize integer frequency division from 926 to 1381. The main steps of this divider design including logic synthesis, placement...
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