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In this paper, a small area spread-spectrum clock generator (SSCG) with high EMI reduction for SATA-3.0 is presented. Conventional methods use inductor-capacitance (LC) tank to fulfill the high frequency requirement for SATA-3.0. However, the monolithic inductors always occupy a large area, and required precisely characteristic for different fabrication processes. This research propose a SSCG using...
The IEEE standards board has announced the approval of the 10G-EPON standard, IEEE Std. 802.3av. In this paper, a 10Gb/s burst-mode laser diode driver for the symmetric-rate 10G-EPON ONU applications is described. It is designed with a low-cost 0.18??m CMOS process. Post-simulation results that it has a speed of 10.3125Gb/s, and is able to provide up to 35mA modulation current under a 1.8V power supply...
This paper presents the design of a third-order continuous-time (CT) single-bit active-RC sigma-delta (SigmaDelta) modulator for Bluetooth application. Through the use of the architecture, cascade of resonators with distributed feedback (CRFB), the signal bandwidth can be improved without increasing the order of the modulator. All integrators are implemented by active-RC type to have better linearity...
While the CMOS analog circuits can be designed with the minimum-gate-length of the fabrication process in the alpha-power law MOSFET model, the length of a MOSFET gate has been chosen to be a larger scale than the minimum-gate-length in the conventional Shockleypsilas square model. In this paper, we describe a 6-b 100 MSPS CMOS current steering digital-to-analog converter (DAC) with the alpha-power...
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